Quantcast
Channel: HyperLynx PCB Analysis Blog » simulation
Browsing latest articles
Browse All 20 View Live

What’s driving the need for PCB power design?

I talk with a lot of customers about their designs and what’s needed to get their products out the door and for the most part, they have many of the same challenges across all industries.  One of the...

View Article



Image may be NSFW.
Clik here to view.

Tired of waiting for your SPICE to finish?

Anyone who has ever had to simulate a SERDES interface knows how long it take to run a couple hundred bits through a SPICE model.  Hours.  Sometimes you have to kick it off overnight.  And if you want...

View Article

Making SERDES sims faster with IBIS-AMI

You may have heard lately about IBIS-AMI models, which are being used more often for SERDES simulation.  IBIS-AMI stands for I/O Buffer Information Specification Algorithmic Modeling Interface.  These...

View Article

S-parameters are for more than just packages

In the digital design world, we have typically only seen S-parameters used to model packages.  They are a popular output of 3D field solvers like IE3D.  But more and more, especially in SERDES design,...

View Article

How do you manage your trace lengths?

Too often I see people just using straight length to manage their board timing.  Or take it one step further and turn length into propagation delay.You know, 1 inch is about 166ps.  Which is true, but...

View Article


Vias are longer than their length

Yeah, that’s what I said.  Vias are longer than their length.  Phrased more appropriately, the delay introduced by a via has a lot more to it than just the length of the via.  For starters, signals...

View Article

The length of your terminator doesn’t matter

Many designers go to great lengths to make sure they do appropriate length-matching, even to the level of including the lengths of their terminators (resistors) in their routing.  Although this seems...

View Article

Can you make Z higher?

Simulations should match measurements.  Otherwise, what good are they?  When doing signal integrity simulations, that starts with comprehensive stackup modeling.  I quite often hear that stackup editor...

View Article


Measurement correlation is just a stackup away

Whether you are trying to correlate simulated waveforms to measured waveforms for a DDR3 signal, or board timing numbers for a simple SDRAM bus, or measured Z-parameters when looking at a PDN...

View Article


It’s never too late

It’s never too late to fix a design problem.  Well, maybe if the product is shipping, that might be classified as “too late”.  But during the design phase, whether you’ve laid out your board or not,...

View Article
Browsing latest articles
Browse All 20 View Live




Latest Images